High-permittivity columbite and perovskite capacitor dielectrics for HBM and DRAM memory stacks

The transition to HBM4 and next-generation stacked-die DRAM architectures is driving an acute need for capacitor dielectrics that can deliver higher permittivity in thinner films than the hafnium-oxide materials that have dominated the last decade. Vertical capacitors in high-bandwidth memory stacks must store more charge per unit footprint as die pitch tightens, and the flat permittivity ceiling of dense HfO2 (typically around 20-25 in its orthorhombic ferroelectric phase, but far lower in its most process-stable amorphous or monoclinic forms) is becoming an engineering bottleneck. The compositions claimed here — MgNb2O6 in the columbite (Pbcn) crystal system and BaCeO3 in a perovskite structure — are computed to sit in the permittivity range of approximately 15–30, a possible route to higher capacitance density; leakage relative to ultra-thin HfO2 has not yet been computed or measured. This asset sits within the broader "Wide-bandgap dielectric stack for advanced packaging and rad-hard electronics" patent family, inside the catalysts and energy-conversion materials portfolio. Its commercial timing is unusually well-defined: the HBM4 transition is underway now, memory makers are actively evaluating dielectric roadmap alternatives, and the vertical-capacitor stacked-die use case is demonstrably less crowded in the patent landscape than the gate-oxide genus that attracted most prior HfO2 filings. The claimed combination of composition, device geometry (stacked-die DRAM and HBM vertical capacitor), electrode materials (Pt, W, Ru, or TiN), and optional copper-barrier integration is designed to secure a blocking or licensing position for any manufacturer seeking to deploy these columbite or perovskite dielectrics in memory stacks.

Candidates are screened for imaginary phonon modes with the machine-learning interatomic potentials named above. This is a computed harmonic check, not a measurement; where engines disagree, that is shown.

MgNb2O6 adopts the columbite crystal structure (orthorhombic, space group Pbcn), a Mg-Nb-O ternary that is closely related to the niobate family of microwave dielectrics long used in bulk ceramic resonators. In bulk ceramic form, MgNb2O6 is known in the microwave-ceramics literature to exhibit dielectric constants in the range of 18–22 with very low loss tangents; the ab initio dielectric-tensor calculations performed here target its behavior as a deposited thin film at 5–30 nm thickness, where the Pbcn phase stability and the absence of soft phonon modes are central questions. BaCeO3 is a perovskite-structure compound better known in the solid oxide fuel cell community as a proton conductor, but in the dielectric context its cerium 4f manifold and the tolerance factor of the Ba-Ce-O system can produce substantially elevated static permittivity, and the claim scope here explicitly distinguishes the prior SOFC proton-conductor use to carve a clean device-use moat. The computational validation workflow applied two independent machine-learning interatomic potentials — specifically MACE and CHGNet — and required both to agree that the MgNb2O6 structure is dynamically stable, meaning the phonon dispersion contains no imaginary-frequency modes anywhere in the Brillouin zone. This agreement between two independently-trained universal potentials substantially reduces the risk of a false-stable prediction that would arise from any single-potential screen. The consensus finding is corroborated by two independent DFT sources, giving a layered validation chain: MLIP screening for speed, DFT for accuracy on the equilibrium structure and its vibrational properties. The dielectric tensor was calculated using density-functional perturbation theory (DFPT) in a 2026 campaign designated CE13, which directly yields the electronic and ionic contributions to the static permittivity. A companion DFPT run on a hafnate reference system (run 0466) provides an internally consistent benchmark against the HfO2 incumbent, allowing the permittivity advantage to be quantified on the same computational footing rather than by mixing literature values from different codes and pseudopotential sets. The device specification embedded in the claims is concrete: a 5–30 nm film deposited as the dielectric layer in a vertical capacitor, targeting a relative permittivity of approximately 15–30, a loss tangent below 5×10⁻³, and a leakage current density below 1×10⁻⁷ A/cm². These are standard memory-grade metrics. The electrode stack includes platinum, tungsten, ruthenium, or titanium nitride, and an optional aluminum-chloride-oxide copper-diffusion barrier can be included to meet integration requirements in back-end-of-line stacked-die flows. The breadth of the electrode options and the inclusion of the barrier layer mean the claim reads on multiple realistic integration schemes rather than being tied to one specific deposition process. The permittivity range of 15–30 is broad enough to be robust against film-thickness and crystallinity variation while still being clearly differentiated from amorphous HfO2's practical low-field permittivity, which in dense (non-doped) form typically sits around 18–22 without the benefit of the ferroelectric orthorhombic phase that requires precise doping and annealing conditions difficult to achieve in thin-film stacked-die geometries.

The DRAM and high-bandwidth memory market represents one of the largest and most capital-intensive sectors in the semiconductor industry. Global DRAM revenue exceeds $80 billion annually, with the HBM segment growing rapidly as AI accelerator demand drives attachment to GPU and NPU packages. Within that broader figure, the dielectric materials and precursor chemistry for capacitor layers in DRAM stacks constitute a smaller but highly concentrated segment: a handful of Tier 1 makers — Samsung, SK Hynix, and Micron — collectively control well over 90% of DRAM production and are the primary technology decision-makers for dielectric roadmaps. The total addressable market for advanced capacitor dielectric materials and associated IP licensing in the DRAM/HBM stack is, by our own unsourced estimate, over $5 billion on a revenue basis, though the licensing-royalty opportunity would represent a fraction of that figure. Royalty rates on process-essential IP in memory dielectrics are typically structured as a small per-wafer or per-bit fee given the high-volume commodity nature of production; even a fraction of a percent of wafer revenue across the HBM4 production ramp represents meaningful licensing income. The race window here is real and time-bounded. HBM4 specifications are being finalized and early production qualification is underway as of mid-2026. Memory makers evaluating dielectric alternatives to extend capacitance density without shrinking to geometries that cause leakage runaway are doing so right now — which means IP filed and granted (or publication-pending with priority date secured) in this window creates blocking leverage at exactly the moment when design-in decisions are being made. A composition-plus-device-use claim structure covering the specific stacked-die vertical-capacitor geometry, if granted, would need to be designed around by any manufacturer wishing to use MgNb2O6 or BaCeO3 in that configuration — or licensed. Process licensing, technology transfer, or outright acquisition of the relevant family are all plausible monetization paths given the strategic posture of the major memory makers toward materials IP.

capacitance density comparable to HfO2/ZrO2 (computed eps ranges overlap) for HBM4-class vertical caps

vertical-capacitor stacked-die use; less crowded than HfO2 gate genus

Preliminary screen only. This is not a freedom-to-operate opinion.

The natural acquirers and licensees are the three dominant DRAM and HBM manufacturers — Samsung Semiconductor, SK Hynix, and Micron Technology — each of whom is actively engaged in the HBM4 technology ramp and each of whom has significant in-house materials IP acquisition programs. SK Hynix, as the current leading HBM supplier to Nvidia's H-series and Blackwell GPU platforms, faces the most acute need to secure its dielectric roadmap ahead of HBM4 volume production. Equipment and precursor chemistry suppliers with strategic materials IP positions — companies such as Applied Materials, Lam Research, and specialty ALD chemistry firms like Entegris or Merck KGaA's semiconductor materials division — are also logical licensees, as they sell the deposition systems and precursors used to deposit exactly these classes of high-k oxides and would benefit from owning or co-licensing composition-plus-process IP to offer customers a licensed solution. On the acquisition side, a vertically integrated memory maker with ambitions in next-generation packaging (particularly any firm investing in hybrid bonding or chiplet stacking where HBM-class vertical capacitors appear in the interposer or memory-die stack) could treat this family as a portfolio acquisition alongside the broader catalysts and energy-conversion materials portfolio. The relatively narrow claim set — covering a specific material class in a specific commercial geometry during an expected industry transition — makes it better suited to a strategic licensing deal or patent package sale than to a broad platform acquisition, though the latter is not excluded if a buyer values the computational methodology and dataset alongside the drafted claims.

The primary technical risk is the gap between computed and measured thin-film properties. Both open validation gates — thin-film leakage/loss coupon measurements and the HSE06 bandgap calculation — bear on the credibility of the leakage current and loss tangent specifications embedded in the claims. If deposited MgNb2O6 films at 5–30 nm exhibit grain-boundary leakage or interfacial trap densities that push the measured leakage above 1×10⁻⁷ A/cm², the device-specification claims would require amendment, potentially narrowing scope. BaCeO3 carries an additional risk: cerium's accessible Ce³⁺/Ce⁴⁺ redox couple can create oxygen vacancy-mediated leakage pathways under operating electric fields, a known failure mode in other Ce-containing perovskites, which makes the HSE06 gap calculation and thin-film leakage coupon particularly important for this composition. Deposition process development for both materials at the 5–30 nm scale in a DRAM-compatible back-end flow is non-trivial and has not been publicly demonstrated at production scale. The prosecution and commercial risk is timing: if HBM4 design-in decisions proceed without the relevant claims granted, the practical leverage window narrows. Patent prosecution timelines in the US and internationally can stretch beyond the HBM4 production ramp if not actively managed. The roadmap to de-risk these concerns is clear: prioritize thin-film coupon fabrication (ALD or PVD at a university or contract fab is feasible at modest cost) to generate experimental data supporting the specification claims; complete the HSE06 calculation to harden the bandgap narrative; and pursue accelerated examination or track-one examination in the US to compress the grant timeline.